A variety of electronic devices are in wide use today, such as laptop computers, smartphones, and tablets. Such electronic devices typically include a microprocessor, volatile storage for use by the microprocessor as it executes application software, and non-volatile storage for storing applications and data on a long term basis.
Sense amplifiers are used in such non-volatile or volatile memory devices to allow for reduced voltage swing on the bit lines thereof. Cross-coupled sense amplifiers are among various sense amplifier configurations used in non-volatile memory circuits. A known cross-coupled sense amplifier includes a pair of inverters “cross coupled” between a pair of bit lines. Each inverter has its input connected to one bit line and its output connected to the other bit line. A cross-coupled sense amplifier provides for fast signal amplification. However, in practice it is difficult to provide the pair of inverters with perfectly matched transistors. Mismatches in transistor characteristics may produce, for example, an offset voltage across the outputs of the inverters during the reset. This offset is reflected to the inputs of the inverters. In a particularly unfortunate scenario, this reflected offset can be detected as a signal representing a data bit, and a data error results. Such data errors are highly undesirable as they may negatively affect performance of the electronic device.
Therefore, there is a need for the development of a new sense amplifier which reduced sensitivity to the mismatches in transistor characteristics and offsets yet maintains the fast response of cross-coupled sense amplifiers.